A voltage limiting semiconductor device is described in German Published Patent Application No. 32 27 536. That reference describes a metallic surface electrode insulated by an oxide layer, which electrode is located over a space charge region of the transistor. The surface electrode is at a potential, determined by a voltage divider, between the potentials of the base and collector of the transistor. By introducing an n.sup.+ type zone, which partially extends under the surface electrode, a space charge region extending in a slightly doped n.sup.- region can be restricted to the areas under the surface electrode by applying a cutoff voltage U between the transistor's base and collector. The breakdown voltage is then basically determined by this potential and the thickness of the oxide layer.
The voltage divider in the device of the aforementioned reference is formed by two monolithically integratable resistors, R1 and R2. The breakdown voltages that can be achieved between the base and collector in the case where R1 and R2 are respectively set to zero are designated U2 and U1, respectively. U2 designates the enhancement breakdown voltage and U1 the depletion breakdown voltage. To monolithically integrate the voltage divider consisting of R1 and R2, a voltage dividing resistor is formed within the lightly doped n.sup.- collector region. Since the breakdown voltage does not depend on the current density, the thickness of the oxide layer over the slightly doped n.sup.- collector region, located between the base and an included highly doped n.sup.+ region, is selected to be smaller than in the remaining area. Thus it is achieved that the depletion breakdown does not occur in the regions adjacent to the voltage dividing resistor. The maximum achievable breakdown voltage U is U1+U2 when the condition R1/R2=U1/U2 is met. Since the thermal oxide layers normally used in planar processes cannot be made arbitrarily thick, the maximum achievable breakdown voltage is limited when such an arrangement is used.
According to German Published Patent Application No. 40 39 662, the breakdown voltage U can be increased by dividing the surface electrodes into two metallic areas. In this case, the surface electrode which fully covers the high-resistance, lightly doped n.sup.- collector region is replaced by a metallic layer which does not fully cover the collector region. The metallic layer covers only the junction zone between the lightly doped n.sup.- collector region and a highly doped n.sup.+ collector region and is connected to the aforementioned voltage divider between the base and collector. A pn junction between the high-resistance lightly-doped n.sup.- collector region and the base region is covered by a second metallic plate which is at the base, or emitter, potential. It is thus achieved that no enhancement breakdown occurs.
When a cutoff voltage is applied between the base and collector, the breakdown voltage that can be achieved between the base and collector, for R2=0, is U1. Thus U1 is the depletion breakdown voltage identical to that of the surface electrode known from German Published Patent Application No. 32 27 536. The breakdown voltage between the base and collector is in this case the depletion breakdown voltage U1, stepped up by the voltage divider formed by resistors R1 and R2; i.e., U=U1.times.(1+R2/R1). The maximum achievable breakdown voltage U between the base and collector is thus no longer influenced by the enhancement breakdown voltage U2. The upper limit of the breakdown voltage is in this case limited only by the cutoff capacity of the pn junction between the base and the lightly doped n.sup.- collector region.
Known surface electrode devices have the disadvantage that there is a potential difference of about 150-250 V between the highly doped n.sup.+ collector region not covered by the oxide layer, in the trough area, and the adjacent surface electrode. If the semiconductor device is damaged or contaminated with ions at the edges, for example, during assembly or operation, short-circuits or leakage currents may appear in the trough region between the surface electrode and the n.sup.+ region. This results in operational failure of the semiconductor device. Additionally, in unpassivated components, spark-over may occur in the trough region between the surface electrode and the n.sup.+ region, leading to weakening of the oxide layer and thus to component failure.